C8051F04x-DK
C8051F04X DEVELOPMENT KIT USER ’S GUIDE
1. Kit Contents
The C8051F04x Development Kit contains the following items:
• Two C8051F040 Target Boards
• C8051Fxxx Development Kit Quick-Start Guide
• Silicon Laboratories IDE and Product Information CD-ROM. CD content includes:
• Silicon Laboratories Integrated Development Environment (IDE)
• Keil 8051 Development Tools (macro assembler, linker, evaluation ‘C’ compiler)
• Source code examples and register definition files
• Documentation
• C8051F04x Development Kit User’s Guide (this document)
• Two AC to DC Power Adapters
• CAN Cable (DB-9 connectors)
• USB Debug Adapter (USB to Debug Interface)
• USB Cable
2. Hardware Setup using a USB Debug Adapter
The target board is connected to a PC running the Silicon Laboratories IDE via the USB Debug Adapter as shown
1. Connect the USB Debug Adapter to the JTAG connector on the target board with the 10-pin ribbon cable.
2. Connect one end of the USB cable to the USB connector on the USB Debug Adapter.
3. Connect the other end of the USB cable to a USB Port on the PC.
4. Connect the ac/dc power adapter to power jack P1 on the target board.
Notes:
• Use the Reset button in the IDE to reset the target when connected using a USB Debug Adapter.
• Remove power from the target board and the USB Debug Adapter before connecting or disconnecting the
ribbon cable from the target board. Connecting or disconnecting the cable when the devices have power can
damage the device and/or the USB Debug Adapter.
AC/DC
Adapter
PC
Target Board
USB Debug Adapter
PWR
USB
Cable
SILICON LABORATORIES
MCU
P1.6
Port 2
Port 1
Port 0
Port 3
Port 4
Figure 1. Hardware Setup using a USB Debug Adapter
Rev. 0.6 9/06
Copyright © 2006 by Silicon Laboratories
C8051F04x-DK
C8051F04x-DK
4.4.1. Creating a New Project
1. Select Project→New Project to open a new project and reset all configuration settings to default.
2. Select File→New File to open an editor window. Create your source file(s) and save the file(s) with a rec-
ognized extension, such as .c, .h, or .asm, to enable color syntax highlighting.
3. Right-click on “New Project” in the Project Window. Select Add files to project. Select files in the file
browser and click Open. Continue adding files until all project files have been added.
4. For each of the files in the Project Window that you want assembled, compiled and linked into the target
build, right-click on the file name and select Add file to build. Each file will be assembled or compiled as
appropriate (based on file extension) and linked into the build of the absolute object file.
Note: If a project contains a large number of files, the “Group” feature of the IDE can be used to organize.
Right-click on “New Project” in the Project Window. Select Add Groups to project. Add pre-defined
groups or add customized groups. Right-click on the group name and choose Add file to group. Select files
to be added. Continue adding files until all project files have been added.
4.4.2. Building and Downloading the Program for Debugging
1. Once all source files have been added to the target build, build the project by clicking on the Build/Make
Project button in the toolbar or selecting Project→Build/Make Project from the menu.
Note: After the project has been built the first time, the Build/Make Project command will only build the
files that have been changed since the previous build. To rebuild all files and project dependencies, click
on the Rebuild All button in the toolbar or select Project→Rebuild All from the menu.
2. Before connecting to the target device, several connection options may need to be set. Open the
Connection Options window by selecting Options→Connection Options... in the IDE menu. First, select
the appropriate adapter in the “Serial Adapter” section. Next, the correct “Debug Interface” must be selected.
C8051F04x family devices use the JTAG debug interface. Once all the selections are made, click the OK
button to close the window.
3. Click the Connect button in the toolbar or select Debug→Connect from the menu to connect to the device.
4. Download the project to the target by clicking the Download Code button in the toolbar.
Note: To enable automatic downloading if the program build is successful select Enable automatic con-
nect/download after build in the Project→Target Build Configuration dialog. If errors occur during the
build process, the IDE will not attempt the download.
5. Save the project when finished with the debug session to preserve the current target build configuration,
editor settings and the location of all open debug views. To save the project, select Project->Save Project
As... from the menu. Create a new name for the project and click on Save.
Rev. 0.6
3
C8051F04x-DK
5. Example Source Code
Example source code and register definition files are provided in the “SiLabs\MCU\Examples\C8051F04x” directory
during IDE installation. These files may be used as a template for code development. Example applications include
a blinking LED example which configures the green LED on the target board to blink at a fixed rate. A Controller
Area Network (CAN) application example is also included with the C8051F04x development kit.
5.1. Register Definition Files
Register definition files C8051F040.inc and C8051F040.h define all SFR registers and bit-addressable control/
status bits. They are installed into the “SiLabs\MCU\Examples\C8051F04x” directory during IDE installation. The
register and bit names are identical to those used in the C8051F04x data sheet. Both register definition files are
also installed in the default search path used by the Keil Software 8051 tools. Therefore, when using the Keil 8051
tools included with the development kit (A51, C51), it is not necessary to copy a register definition file to each
project’s file directory.
5.2. Blinking LED Example
The example source files blink.asm and blinky.c show examples of several basic C8051F04x functions. These
include; disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer for an interrupt
routine, initializing the system clock, and configuring a GPIO port. When compiled/assembled and linked this pro-
gram flashes the green LED on the C8051F040 target board about five times a second using the interrupt handler
with a C8051F040 timer.
4
Rev. 0.6
C8051F04x-DK
5.3. Controller Area Network (CAN) Application Example
Configuration and use of the CAN controller is documented in the Bosch CAN User’s Guide, located in the “Documen-
tation” directory on the CD-ROM. Accessing the CAN controller (i.e., accessing the CAN RAM, CAN registers, and
moving data to and from the CAN controller) is documented in Silicon Laboratories’ C8051F04x data sheet.
An example CAN application is included in the “Examples\C8051F04x” directory. Each C8051F040 target board fea-
tures a push button (labeled P3.7) and a LED (labeled P1.6). After the two target boards are connected together via
the provided CAN bus physical layer (i.e. cable, connectors, and CAN transceiver), the example application sends
CAN messages between the two target boards containing the state of the push buttons. In this example, each CAN
controller has two of the 32 message objects configured: one to send a control signal based on the state of its target
board push button, and one to receive a control signal from the other target to see if it should turn on/off its own LED.
When a target board receives a message that the push button on the other target board is depressed, it lights its own
LED. When a target board receives a message that the push button on the other target board is not depressed, it
turns off its own LED. In this way, the push button on one target board controls the LED on the other target board as
a virtual control link via a CAN bus.
5.3.1. Setting-up the Application
1. Connect the target boards together at the CAN DB-9 connectors using the CAN cable provided in the
development kit, as shown in Figure 2 on page 6. The correct cable has a male connector on both ends.
location of the CAN DB-9 connector.
2. Compile and link the can1.c example located in the “Examples\C8051F04x” directory on the CD-ROM.
Choose one of the target boards as Target Board #1. Connect to Target Board #1 and download the can1
project to the C8051F040, following the steps outlined in Section 4.4 on page 2. Once downloaded, close
this project in the IDE and disconnect the Debug Adapter from Target Board #1.
3. Connect the Debug Adapter to the other target board, Target Board #2. Open a new project in the IDE and
load can2.c into the C8051F040 device, just as was done in step 2 for Target Board #1. Take care not to
load can1.c into both devices. Disconnect the Debug Adapter from this board.
You should now have can1.c loaded into Target Board #1, and can2.c loaded into Target Board #2. The CAN cable
should be connected to both boards at the CAN DB-9 connectors.
5.3.2. Running the Application
1. Start the application by resetting the device on each target board. Do this by depressing the RESET push
button on each target board. As can1.c executes on Target Board #1, and can2.c runs on Target Board #2,
the devices are now nodes on a CAN bus.
2. Pressing the P3.7 push button on Target Board #1 will light the LED on Target Board #2. Likewise, when
the push button on Target Board #1 is released, the LED on Target Board #2 will turn off. This will work on
either target board.
Once this example is running, you have established a simple CAN network with two nodes. When one C8051F040
device senses the push button on its target board is pressed, it sends a “0x11” in the first byte of a CAN message
data field. When the button is released, the first byte of the CAN message data field is “0x00”. When a C8051F040
device receives a message, it checks whether this byte has a value of “0x11” or “0x00”. When the byte is “0x11”,
the device turns on its LED by setting P1.6 high. When the byte is “0x00”, the device turns off its LED by setting
P1.6 low.
Rev. 0.6
5
C8051F04x-DK
You may run the example with the Debug Adapter connected to view CAN registers, and CAN message objects in
CAN RAM. While connected to one target board, run the code. Depress the RESET button on the other target
board. You may use debug and view features of the Silicon Laboratories IDE and on-chip debug logic. To view the
CAN SFRs, click View→Debug Windows→SFRs→CAN0. To view message objects in CAN RAM, click
View→Debug Windows→CAN0 Message Registers. To view SFRs and message registers, the device must be
in a halt state to update the debug view windows.
Important Note: To view a Message Object in the CAN Message Registers window, you must set its Message Valid
bit to 1 in the Message Object's associated Message Arbitration 2 Register (Bit 15, ARBT2). This can be done in
code by configuring the IF1 and IF2 registers to set the associated Message Objects’ ARBT2 register. A second
method to set this bit is available while viewing the Message Object registers in the IDE CAN0 Message Registers
view. Click on, and change, the associated Message Objects’ ARBT2 register directly. Working in the background
the IDE will set the register for you via the IF1 and IF2 registers.
AC/DC
Adapter
Ribbon
Cable
PC
Target
Board
Serial or USB
Cable
Debug
Adapter
Serial or USB Port
AC/DC
Adapter
Serial
Cable
Target
Board
Figure 2. CAN Application Hardware Setup
6
Rev. 0.6
C8051F04x-DK
6. Target Board
The C8051F04x Development Kit includes a target board with a C8051F040 device pre-installed for evaluation and
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping
P1
J1
Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
Connects SW2 to P3.7 pin
J3
Connects LED D3 to P1.6 pin
J4
J5
J6
JTAG connector for Debug Adapter interface
DB-9 connector for UART0 RS232 interface
Connector for UART0 TX (P0.0)
J8
Connector for UART0 RTS (P4.0)
J9
Connector for UART0 RX (P0.1)
J10
J11
Connector for UART0 CTS (P4.1)
Analog loopback connector
J12-J19 Port 0 - 7 connectors
J20
J22
J23
J24
J25
Analog I/O terminal block
VREF connector
VDD Monitor Disable
96-pin Expansion I/O connector
DB-9 connector for CAN interface
P3.7
RESET
P1.6
J24
J3
Port 1
Port 2
Port 3
Port 0
Port 7
Port 6
Port 5
Port 4
J10
J8
J6
J9
Pin 1
C8051
F04X
Pin 2
Pin 1
J21
J2
J22
Pin 2
Pin 1
J20
P1
J11
Pin 1
PWR
Pin 1
Figure 3. C8051F040 Target Board
Rev. 0.6
7
C8051F04x-DK
6.1. System Clock Sources
The C8051F040 device installed on the target board features a calibrated programmable internal oscillator which is
enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of
3.0625 MHz (±2%) by default but may be configured by software to operate at other frequencies. Therefore, in many
applications an external oscillator is not required. However, an external 22.1184 MHz crystal is installed on the target
board for additional applications. Refer to the C8051F04x data sheet for more information on configuring the system
clock source.
6.2. Switches and LEDs
Two switches are provided on the target board. Switch SW1 is connected to the RESET pin of the C8051F040.
Pressing SW1 puts the device into its hardware-reset state. Switch SW2 is connected to the C8051F040’s general
purpose I/O (GPIO) pin through headers. Pressing SW2 generates a logic low signal on the port pin. Remove the
shorting block from the header to disconnect SW2 from the port pins. The port pin signal is also routed to a pin on
Two LEDs are also provided on the target board. The red LED labeled PWR is used to indicate a power connection
to the target board. The green LED labeled with a port pin name is connected to the C8051F040’s GPIO pin
through headers. Remove the shorting block from the header to disconnect the LED from the port pin. The port pin
signal is also routed to a pin on the J24 I/O connector. See Table 1 for the port pins and headers corresponding to
each LED.
Table 1. Target Board I/O Descriptions
Description
SW1
I/O
Reset
P3.7
P1.6
PWR
Header
none
J1
SW2
Green LED
Red LED
J3
none
6.3. Target Board JTAG Interface (J4)
The JTAG connector (J4) provides access to the JTAG pins of the C8051F040. It is used to connect the Serial
Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming. Table 2
shows the JTAG pin definitions.
Table 2. JTAG Connector Pin Descriptions
Pin #
Description
+3 VD (+3.3 VDC)
GND (Ground)
TCK
1
2, 3, 9
4
5
TMS
6
TDO
7
TDI
8, 10
Not Connected
8
Rev. 0.6
C8051F04x-DK
6.4. Serial Interface (J5)
A RS232 transceiver circuit and DB-9 (J5) connector are provided on the target board to facilitate serial connec-
tions to UART0 of the C8051F040. The TX, RX, RTS and CTS signals of UART0 may be connected to the DB-9
connector and transceiver by installing shorting blocks on headers J6, J8, J9 and J10.
J6 - Install shorting block to connect UART0 TX (P0.0) to transceiver.
J9 - Install shorting block to connect UART0 RX (P0.1) to transceiver.
J8 - Install shorting block to connect UART0 RTS (P4.0) to transceiver.
J10 - Install shorting block to connect UART0 CTS (P4.1) to transceiver.
6.5. Analog I/O (J11, J20)
Several C8051F040 analog signals are routed to the J20 terminal block and the J11 header. The J11 connector
provides the ability to connect DAC0 and DAC1 outputs to several different analog inputs by installing a shorting
block between a DAC output and an analog input on adjacent pins of J11. Refer to Table 3 for J20 terminal block
Table 3. J20 Terminal Block Pin Descriptions
Pin #
Description
HVAIN+
1
2
3
4
5
6
7
8
HVAIN-
HVREF
DAC1
AIN0.0
AIN0.1
VREF0
ADND (Analog Ground)
Table 4. J11 Connector Pin Descriptions
Pin #
Description
AIN0.0
1
2
3
4
5
6
AIN0.1
DAC0
DAC1
AIN0.2
AIN0.3
Rev. 0.6
9
C8051F04x-DK
6.6. Controller Area Network (CAN) Interface (J25)
A DB-9 (J25) connector is provided to facilitate serial connections to the CAN interface on the C8051040. In addi-
tion, when a shorting block is installed on header J7, writing a logic 'high' to port pin P4.2 will place the CAN trans-
ceiver in low-current standby mode. Also, resistor R12 may be replaced with a higher value to control the slew rate
of the CAN_H and CAN_L signals. See the TI SN65HVD230 data sheet for further information. Table 5 listes the pin
descriptions for J25.
Table 5. CAN Connector Pin Descriptions
Pin #
Description
CAN_L
2
7
CAN_H
3, 6
GND (Ground)
Not Connected
1, 4, 5, 8, 9
6.7. PORT I/O Connectors (J12 - J19)
In addition to all port I/O signals being routed to the 96-pin expansion connector, each of the eight parallel ports of
the C8051F040 has its own 10-pin header connector. Each connector provides a pin for the corresponding port
pins 0-7, +3.3VDC and digital ground. Table 6 defines the pins for the port connectors. The same pin-out order is
used for all of the port connectors.
Table 6. J12- J19 Port Connector Pin Descriptions
Pin #
Description
1
2
Pn.0
Pn.1
3
Pn.2
4
Pn.3
5
Pn.4
6
Pn.5
7
Pn.6
8
Pn.7
9
+3 VD (+3.3 VDC)
GND (Ground)
10
6.8. VDD Monitor Disable (J23)
The VDD Monitor of the C8051F040 may be disabled by moving the shorting block on J23 from pins 1–2 to pins 2–
3, as shown in Figure 4.
1
MONEN
2
3
Figure 4. VDD Monitor Hardware Setup
10
Rev. 0.6
C8051F04x-DK
6.9. Expansion I/O Connector (J24)
The 96-pin expansion I/O connector J24 is used to connect daughter boards to the main target board. J24 provides
access to many C8051F040 signal pins. Pins for +3 V, digital ground, analog ground and the unregulated power
supply (VUNREG) are also available. The VUNREG pin is connected directly to the unregulated +V pin of the P1
The J24 socket connector is manufactured by Hirose Electronic Co. Ltd, part number PCN13-96S-2.54DS, Digi-
Key part number H7096-ND. The corresponding plug connector is also manufactured by Hirose Electronic Co. Ltd,
part number PCN10-96P-2.54DS, Digi-Key part number H5096-ND.
Table 7. J24 Pin Descriptions
Pin #
Description
Pin #
Description
Pin #
C-1
Description
XTAL1
P1.6
A-1 +3 VD2 (+3.3 VDC)
B-1 DGND (Digital Gnd)
A-2
A-3
MONEN
P1.5
P1.2
P2.7
P2.4
P2.1
P3.6
P3.3
P3.0
P0.5
P0.2
P7.7
P7.4
P7.1
P6.6
P6.3
P6.0
P5.5
P5.2
P4.7
P4.4
P4.1
TCK
/RST
B-2
B-3
P1.7
P1.4
P1.1
P2.6
P2.3
P2.0
P3.5
P3.2
P0.7
P0.4
P0.1
P7.6
P7.3
P7.0
P6.5
P6.2
P5.7
P5.4
P5.1
P4.6
P4.3
P4.0
TDI
C-2
C-3
P1.3
A-4
B-4
C-4
P1.0
A-5
B-5
C-5
P2.5
A-6
B-6
C-6
P2.2
A-7
B-7
C-7
P3.7
A-8
B-8
C-8
P3.4
A-9
B-9
C-9
P3.1
A-10
A-11
A-12
A-13
A-14
A-15
A-16
A-17
A-18
A-19
A-20
A-21
A-22
A-23
A-24
A-25
B-10
B-11
B-12
B-13
B-14
B-15
B-16
B-17
B-18
B-19
B-20
B-21
B-22
B-23
B-24
C-10
C-11
C-12
C-13
C-14
C-15
C-16
C-17
C-18
C-19
C-20
C-21
C-22
C-23
C-24
C-25
C-26
C-27
C-28
C-29
C-30
C-31
P0.6
P0.3
P0.0
P7.5
P7.2
P6.7
P6.4
P6.1
P5.6
P5.3
P5.0
P4.5
P4.2
TMS
TDO
B-25 DGND (Digital Gnd)
VUNREG
DAC0
A-26 AGND (Analog Gnd)
B-26
B-27
B-28
B-29
B-30
B-31
DAC1
CANTX
VREF
A-27
A-28
A-29
A-30
A-31
A-32
CANRX
VREFD
HVAIN-
HVREF
AIN0.1
VREF0
HVAIN+
AIN0.3
AIN0.0
VREF2
HVCAP
AIN0.2
B-32 AGND (Analog Gnd)
C-32 AV+ (+3.3 VDC Analog)
Rev. 0.6
11
C8051F04x-DK
6.10. VREF Connector (J22)
The VREF connector (J22) can be used to connect the VREF (Voltage Reference) output of the C8051F040 to any
(or all) of its voltage reference inputs. Install shorting blocks on J22 in the following manner:
1-2 to connect VREF to VREFD
3-4 to connect VREF to VREF0
5-6 to connect VREF to VREF2
12
Rev. 0.6
C8051F04x-DK
7. Schematic
Rev. 0.6
13
C8051F04x-DK
DOCUMENT CHANGE LIST
Revision 0.4 to Revision 0.5
„ Section 1, added USB Debug Adapter and USB Cable.
„ Section 2, changed name from "Hardware Setup" to "Hardware Setup using an EC2 Serial Adapter".
„ Section 2, added 2 Notes bullets.
„ Section 2, removed Note from bottom of page.
„ Added Section 3, "Hardware Setup using a USB Debug Adapter".
„ Section 5.4.2, changed step 2 to include new instructions.
„ Section 7, J4, changed "Serial Adapter" to "Debug Adapter".
„ Target Board DEBUG Interface Section, added USB Debug Adapter.
„ DEBUG Connector Pin Descriptions Table, changed pin 4 to C2D.
„ Changed "jumper" to "header".
„ EC2 Serial Adapter section, added EC2 to the section title, table title and figure title.
„ EC2 Serial Adapter section, changed "JTAG" to "DEBUG".
„ Added "USB Debug Adapter" section.
„ Added J8 and J10 to the connector list.
Revision 0.5 to Revision 0.6
„ Removed EC2 Serial Adapter from Kit Contents.
„ Removed Section 2. Hardware Setup using an EC2 Serial Adapter. See RS232 Serial Adapter (EC2) User's
Guide.
„ Removed Section 8. EC2 Serial Adapter. See RS232 Serial Adapter (EC2) User's Guide.
„ Removed Section 9. USB Debug Adapter. See USB Debug Adapter User's Guide.
14
Rev. 0.6
C8051F04x-DK
NOTES:
Rev. 0.6
15
C8051F04x-DK
CONTACT INFORMATION
Silicon Laboratories Inc.
4635 Boston Lane
Austin, TX 78735
Tel: 1+(512) 416-8500
Fax: 1+(512) 416-9669
Toll Free: 1+(877) 444-3032
Email: [email protected]
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features
or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-
resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-
plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
16
Rev. 0.6
|