Renesas Computer Hardware EDK3687 User Guide

EDK3687  
USER MANUAL  
FOR H8/3687  
ON-CHIP FLASH MICROCONTROLLER  
 
1. TABLE OF CONTENTS  
3
 
 
2.  
START-UP INSTRUCTIONS  
2.1. INSTALLING THE EVALUATION DEVELOPMENT KIT (EDK)  
Please refer to the quick start guide provided for initial installation of the EDK.  
A copy of the quick start guide and other information relating to this EDK at:  
Installing the EDK requires power and serial connection to a host computer.  
2.2. SERIAL CONNECTION  
The serial communications cable for connecting the EDK to a host computer requires 1:1 connectivity.  
Figure 2-1 shows how to connect the EDK to a PC or notebook computer equipped with a nine pin D connector.  
HOST  
PC  
EDK  
3
2
5
3
2
5
FIGURE 2-1: SERIAL CONNECTION TO PC/NOTEBOOK WITH DB-9 CONNECTOR (SUPPLIED)  
2.3. POWER SUPPLY  
The EDK hardware requires a power supply of +5V. Since total power consumption can vary widely due to external  
connections, port states, and memory configuration, use a power supply capable of providing at least 500mA at +5V DC ±  
5%.  
The design is specified for evaluation of the microcontroller and so does not include circuitry for supply filtering/noise  
reduction, under voltage protection, over current protection or reversed polarity protection. Caution should be used when  
selecting and using a power supply.  
The power connector on the EDK is a 2.5mm Barrel connector. The center pin is the positive connection.  
FIGURE 2-2: POWER SUPPLY CONNECTION  
Caution: Existing customers using E6000 products note that the polarity of this board is opposite to that for the  
E6000. Use of the E6000 power supply with this board will damage both board and power supply.  
4
 
   
3. EDK BOARD LAYOUT  
The diagram shows a general layout of the EDK board.  
FLASH  
Programming  
J1  
5V  
Power  
UVcc  
GND  
Testpoints  
RESn  
FW  
NMIn  
ULED1  
ULED2  
PSCK  
NMI  
Switch  
LIN  
SPI  
OSC  
Power LED  
PTXD  
User1 LED  
PRXD  
User2 LED  
RX232  
TX232  
Microprocessor  
RESET  
Switch  
CTS  
RTS  
9-Way  
D-Type  
I2C  
J2  
CJ4  
FIGURE 3-1: EDK BOARD LAYOUT  
3.1. EDK BLOCK DIAGRAM  
The diagram shows the connectivity of the components on the EDK board.  
External  
PSU  
Reset  
NMI  
Switches  
EDK specific  
Switch De-Bounce  
LIN  
SPI  
I2C  
RS232  
Programming  
& Comms  
Microprocessor  
On-Chip  
Debug  
Connector  
LEDs  
User1  
Header  
Connectors  
&
Power  
User2  
FIGURE 3-2: EDK BLOCK DIAGRAM  
5
 
   
4. EDK OPERATION  
4.1. USER INTERFACE  
The EDK provides two buttons for influencing the operation of the board. The purpose of each button is clearly marked next  
to it. Refer to the board layout for positions (Section 3)  
1. Reset Switch  
This button provides the microcontroller with a reset pulse utilizing the built in power on reset control of the device.  
2. NMI Switch  
This button provides a de-bounced signal to the microcontroller for each operation of the button. There is no maximum  
activation time for this button.  
4.2. SERIAL INTERFACE  
The serial port on the microcontroller directly supports three wire serial interfaces. Options are provided on the board for the  
user to write handshaking routines using standard port pins.  
4.2.1. CONNECTOR PIN DEFINITIONS  
The EDK RS232 interface conforms to Data Communication Equipment (DCE) format allowing the use of 1-1 cables when  
connected to Data Terminal Equipment (DTE) such as an IBM PC. The cable used to connect to the EDK will affect the  
available board options. A fully wired cable can allow handshaking between the microcontroller and the host PC, subject to  
setting the board options and the availability of suitable host software. Handshaking is not supported as standard on the  
microcontroller so for normal use a minimal three-wire cable can be used. The minimum connections are unshaded in the  
following table.  
EDK DB9  
Signal  
Host DB9  
Connector Pin  
Connector Pin  
1
2
3
4
5
6
7
8
9
No Connection  
1
2
3
4
5
6
7
8
9
EDK Tx Host Rx  
EDK Rx Host Tx  
No Connection  
Ground  
No Connection  
EDK CTS Host RTS  
EDK RTS Host CTS  
No Connection  
TABLE 4-1: RS232 INTERFACE CONNECTIONS  
5
4
3
2
1
9
8
7
6
FIGURE 4-1: EDK SERIAL PORT PIN NUMBERING  
6
 
 
4.2.2. CRYSTAL CHOICE  
The operating crystal frequency has been chosen to support the fastest operation with the fastest serial operating speeds.  
The value of the crystal is 18.432MHz.  
The following table shows the baud rates and Baud Rate Register (BRR) setting required for each communication rate using  
the above default operating speed. It also confirms the resultant baud rate and the bit error rate that can be expected.  
Baud Rate Register Settings for Serial Communication Rates  
SMR  
Setting:  
Comm.  
Baud  
0
1
2
3
BRR  
setting  
Actual  
Rate  
ERR  
(%)  
BRR  
setting  
Actual  
Rate  
ERR  
(%)  
BRR  
setting  
Actual  
Rate  
ERR  
(%)  
BRR  
setting  
Actual  
Rate  
ERR  
(%)  
110  
Invalid Invalid Invalid Invalid Invalid Invalid Invalid Invalid Invalid 81  
110  
-0.22  
300  
1200  
Invalid Invalid Invalid Invalid Invalid Invalid 119  
300  
0.00  
0.00  
0.00  
-6.25  
-6.25  
-6.25  
29  
7
300  
0.00  
Invalid Invalid Invalid 119  
1200  
2400  
0.00  
29  
14  
7
1200  
2400  
4500  
9000  
18000  
1125  
2250  
4500  
-6.25  
-6.25  
-6.25  
2400  
239  
119  
59  
29  
14  
9
2400  
0.00  
0.00  
0.00  
0.00  
0.00  
0.00  
59  
29  
14  
7
0.00  
3
4800  
4800  
4800  
0.00  
1
9600  
9600  
9600  
0.00  
3
Invalid Invalid Invalid  
Invalid Invalid Invalid  
19200  
38400  
57600  
115200  
230400*  
460800*  
19200  
38400  
57600  
18000  
36000  
48000  
-6.25  
-6.25  
-16.67  
1
3
Invalid Invalid Invalid Invalid Invalid Invalid  
Invalid Invalid Invalid Invalid Invalid Invalid  
Invalid Invalid Invalid Invalid Invalid Invalid  
2
4
115200 0.00  
192000 -16.67  
576000 25.00  
0
144000 25.00  
2
Invalid Invalid Invalid Invalid Invalid Invalid Invalid Invalid Invalid  
Invalid Invalid Invalid Invalid Invalid Invalid Invalid Invalid Invalid  
0
TABLE 4-2 CRYSTAL FREQUENCIES FOR RS232 COMMUNICATION  
* Note: The device used to convert the RS232 serial information to logic signals for the microcontroller is limited to  
120kBaud. The rates above this level can only be utilised if the user provides direct logic level communications.  
The user may replace the HC49/U surface mounted AT cut crystal with another of similar type within the operating frequency  
of the microcontroller device. Please refer to the hardware manual for the microcontroller for the valid operating range.  
Alternatively the user may fit an oscillator module – or provide an external clock source. When providing an oscillator module  
or external source it is highly recommended that the load capacitors for the AT crystal are removed from the PCB. These are  
physically placed within the PCB outline of the oscillator module for easy location and to ensure they are removed when  
using this option.  
When changing the crystal frequency the pre-loaded debugging monitor will not function. In this situation the user is  
responsible for providing code to evaluate the device away from the default operating speed.  
4.2.3. REMOVABLE COMPONENT INFORMATION.  
This information is provided to allow the replacement of components removed from the board as described in section 4.2.2.  
Component  
Cct. Ref  
R8  
R7  
C2,C3  
C4,C5  
Value  
1M  
1MΩ  
12pF  
15pF  
Rating  
0805 1%  
0805 1%  
0603 10% 25V  
0603 10% 25V  
Manufacturer  
Welwyn WCR Series  
Welwyn WCR Series  
AVX 0603 3 A 150 KAT  
AVX 0603 3 A 150 KAT  
Load Resistor (X2)  
Load Resistor (X3)  
Load capacitors (X2)  
Load capacitors (X3)  
TABLE 4-3: REMOVABLE COMPONENT INFORMATION  
Care must be taken not to damage the tracking around these components. Only use soldering equipment designed for  
surface mount assembly and rework.  
4.3. SPI EEPROM  
The board has been tested with an Atmel AT25040N-10SA-2.7 SPI EEPROM device (Not supplied).  
The device should be connected to P30, P31, P32 and P67 using 0R links on R15, R16, R17 and R21. Alternative  
connections are available, refer to section 5.3 for more information.  
Do not fit the CAN transceiver if the SPI device is fitted while using the settings above.  
7
 
   
4.4. I2C EEPROM  
The board has been tested with an Atmel AT24C04AN-10SI-2.7 I2C EEPROM device (Not supplied).  
The device is configured to connect to dedicated I2C pins on Ports P56 and P57.  
4.5. LIN INTERFACE  
The board has been tested with an Philips TJA1020TD device (Not supplied).  
The device should be connected to P71 and P72 using 0R links on R29 and R31. Alternative connections are available; refer  
to section 5.3 for more information.  
The links R41, R45 and R47 need to be carefully considered before fitting. Damage to the device, board or connected  
equipment may occur if these links are fitted inappropriately. Please review the specifications for the LIN transceiver and LIN  
Interface before fitting any of these links.  
4.6. LEDS  
The EDK has three red LEDs. The function of each LED is clearly marked on the silk screen of the PCB. Please refer to the  
When the board is connected to a power source the Power (PWR) led will illuminate.  
There are two LEDs dedicated for user control these are marked USR1 and USR2. Each LED will illuminate when the port  
pin is in a logical low state.  
The user LEDs are connected to the following ports:  
LED  
Identifier  
USR1  
Port  
Pin  
P64  
P65  
Microcontroller  
Pin  
37  
38  
Pin Functions on  
Port Pin  
FTIOA1  
USR2  
FTIOB1  
TABLE 4-4: LED PORT CONNECTIONS  
8
 
 
5. BOARD OPTIONS  
The EDK has a number of configuration settings set by four jumpers CJ4 (A, B, C, D) and zero-ohm links. Common EDK  
functions can be set using the jumpers as described in sections 5.2. The additional zero-ohm links provide additional  
features that may be required to interface with other systems.  
All the Jumper link settings are three pin options. There are four sets of options on each header.  
The headers are numbered from 1 to 12 with pin 1 marked on the PCB by an arrow pointing to the pin. The diagram below  
shows the numbering of these jumper links and indicates jumpers fitted 1-2 for each three-pin jumper.  
5.1. JUMPER LINKS  
FLASH  
Programming  
J1  
5V  
Power  
UVcc  
GND  
Testpoints  
RESn  
FW  
NMIn  
ULED1  
ULED2  
PSCK  
PTXD  
PRXD  
RX232  
TX232  
NMI  
Switch  
LIN  
SPI  
OSC  
Power LED  
User1 LED  
User2 LED  
Microprocessor  
RESET  
Switch  
CTS  
RTS  
9-Way  
D-Type  
I2C  
J2  
CJ4  
1
1
2
2
3
3
4
1
5
2
6
3
7
1
8
2
9
3
10 11 12  
1
2
3
Jumper  
A
Jumper  
B
Jumper  
C
Jumper  
D
1,2,3  
1,2,3  
1,2,3  
1,2,3  
FIGURE 5-1: JUMPER CONFIGURATION  
The following tables define each jumper and its settings.  
9
 
 
5.2. EDK OPTIONS – CJ4  
The EDK options provide access to commonly used features of the EDK range.  
These jumpers must be fitted at all times to ensure correct operation of the EDK.  
Jumper  
CJ 4-A  
Default 1-2  
CJ 4-B  
Default 1-2  
CJ 4-C  
Function  
Serial Receive  
Source  
Serial Transmit  
Destination  
Serial Receive  
Source  
Setting 1-2  
Setting 2-3  
Routes the programming serial port  
to the LIN Interface  
Routes the programming serial port  
to the LIN Interface  
Routes the programming serial  
port to the 9Way D Connector  
Routes the programming serial  
port to the 9Way D Connector  
Enable the Flash Programming  
header data receive  
Enable the RS232 interface data  
receive.  
Default 2-3  
CJ 4-D  
Default 1-2  
BOOT Mode  
Selection  
User Mode  
BOOT Mode  
TABLE 5-1: BOARD OPTION: JUMPER SETTINGS (DEFAULT SETTINGS IN BOLD)  
The following table lists the connections to each jumper pin.  
Pin  
1
Net Name  
RX232  
Description  
RS232 received data  
2
3
4
RX_OPT  
LIN_RX  
TX232  
Link to below – Data from RS232 or LIN  
LIN received data  
RS232 transmitter  
5
PTXD  
Data transmission  
6
7
8
LIN_TX  
RX_HDR  
PRXD  
LIN transmitter  
Flash Programming Header received data  
Data reception  
9
RX_OPT  
NC  
NMIn  
Link to above – Data from RS232 or LIN  
No Connection  
NMI used for BOOT mode selection  
System Ground  
10  
11  
12  
GROUND  
10  
 
   
5.3. OPTION LINK SELECTION  
The following sections show the option links that apply to each peripheral device. The tables all use the same key of symbols  
which is given below:  
X – Groups of options one set of which must be fitted for correct operation of the EDK.  
O – Groups of options which if fitted must be connected in the groups as shown by the table row.  
S – Optional selection that will enable or disable specific device functions as listed.  
! – Options which when incorrectly fitted may damage the board or attached devices.  
5.3.1. RST – RESET FUNCTION  
The HD643687GFP device includes a built in reset control circuit.  
C
R
2
C
R
3
C
R
4
C
R
8
C
R
9
C
R
10  
Internal  
External  
X
X
Default  
RST  
X
X
X
X
TABLE 5-2: OPTION LINKS  
The alternate settings can be fitted without damage to the device.  
5.3.2. LIN – LIN INTERFACE  
The LIN interface is not fitted by default. The transceiver can be connected to two groups of pins. The SCI2 (56,57,58) pins  
are shared with the CAN transceiver, do not use this selection when the CAN transceiver is fitted.  
SCI2 SCI2 R R R R R R R R R R R  
48,49,5056,57,581227262930 313241454647  
SCI  
SCI  
O
O
O
Default  
O
O
O
NWAKE  
NSLP  
!
!
S
LIN  
FTOA0  
IRQ3n  
MASTER  
SLAVE  
POWER  
S
S
X
X
!
TABLE 5-3: OPTION LINKS  
11  
 
   
5.3.3. SPI – SERIAL PERIPHERAL INTERFACE  
The SPI interface is not directly compatible with the SCI interface on the device. Selection of the connections to the SPI  
interface should therefore be chosen to allow the operation of other peripherals as required.  
SCI2  
SCI2  
R
R
R
R
R
R
R
R
R
R
R
R
R
SSU 48,49,50 56,57,58 15 16 17 18 19 20 21 22 23 24 25 35 37  
SCI  
SCI  
X
O
O
O
O
SPI  
SPI  
X
O
O
O
SCI  
X
O
O
O
HOLDn  
WPn  
CSn  
S
S
X
TABLE 5-4: OPTION LINKS  
5.3.4. CAN – CONTROLLER AREA NETWORK  
The CAN device, when fitted, is permanently connected to microcontroller pins 56 & 57. Other options share these pins so be  
sure that the alternate settings are made for the other peripheral options to avoid contentions on the board.  
5.4. FLASH PROGRAMMING HEADER  
The Flash Programming header is used with the Flash Debugging Module (FDM). The FDM is a USB based programming  
tool for control and programming of Renesas microcontrollers, available separately from Renesas. This header provides  
direct access for the FDM to control the EDK microcontroller.  
To utilise this header the user must make the following changes to the board configuration.  
1. Select the FDM header using CJ4-C as marked on the silk screen. Please refer to section 5.2.  
5.5. EXTERNAL DEBUG HEADER  
The External debug header may be used with the Renesas E10T Debugger, Renesas LEM Debugger or a third party  
debugger.  
The E10T and LEM are on-chip debug emulators available separately from Renesas.  
This header provides direct access for the debugger to control the EDK microcontroller.  
5.6. BOOT CONTROL  
The EDK provides a jumper selection to place the microcontroller device into boot mode. This jumper link grounds the NMI  
pin on the device.  
Always remove the power from the EDK before moving this jumper to prevent unintended effects in the processor that may  
prevent the programming function from completing successfully.  
12  
 
   
6. MICROCONTROLLER HEADER CONNECTIONS  
The following table lists the connections to each or the headers on the board.  
6.1. HEADER J1  
J1  
Pin  
No  
Function  
EDK Symbol  
Device  
pin  
Pin  
No  
Function  
EDK Symbol  
Device  
pin  
1
3
5
7
TEST  
VCL(No Connection)  
X2  
PB7/AN7  
PB5/AN5  
PB0/AN0  
PB2/AN2  
P30  
GND  
NC3  
CON_X2  
PB7  
PB5  
PB0  
PB2  
P30  
P32  
P17  
P15  
P72  
P70  
PTXD  
PSCK  
P86  
8
6
4
2
2
4
6
8
RESn  
X1  
AVCC  
PB6/AN6  
PB4/AN4  
PB1/AN1  
PB3/AN3  
P31  
RESn  
CON_X1  
CON_AVCC  
PB6  
PB4  
PB1  
PB3  
P31  
P33  
P16  
CTS  
P71  
P23  
PRXD  
P87  
7
5
3
1
9
64  
62  
60  
58  
56  
54  
52  
50  
48  
46  
44  
42  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
63  
61  
59  
57  
55  
53  
51  
49  
47  
45  
43  
41  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
P32  
P33  
P17/IRQ3n/TRGV  
P15/IRQ1n/TMIB1  
P72/TXD_2  
P70/SCK3_2  
P22/TXD  
P20/SCK3  
P86  
P16/IRQ2n  
P14/IRQ0n  
P71/RXD_2  
P23  
P21/RXD  
P87  
P85  
P85  
6.2. HEADER J2  
J2  
Pin  
No  
Function  
EDK Symbol  
Device  
pin  
Pin  
No  
Function  
EDK Symbol  
Device  
pin  
1
3
5
7
VSS  
OSC1  
P50/WKP0n  
P34  
P36  
P52/WKP2n  
P54/WKP4n  
P10/TMOW  
P12  
P57/SCL  
P75/TMCIV  
P24  
P62/FTIOC0  
NMIn  
P64/FTIOA1  
P66/FTIOC1  
GND  
CON_OSC1  
P50  
P34  
P36  
P52  
P54  
P10  
P12  
P57  
P75  
P24  
P62  
NMIn  
ULED1  
RTS  
9
2
4
6
8
OSC2  
VCC  
P51/WKP1n  
P35  
P37  
P53/WKP3n  
P55/WKP5n/ADTRGn  
P11/PWM  
P56/SDA  
P74/TMRIV  
P76/TMOV  
P63/FTIOD0  
P61/FTIOB0  
P60/FTIOA0  
P65/FTIOB1  
P67/FTIOD1  
CON_OSC2  
EVCC 1  
P51  
P35  
P37  
P53  
P55  
P11  
P56  
P74  
P76  
P63  
P61  
P60  
ULED2  
P67  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
33  
35  
37  
39  
9
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
13  
 
 
7. CODE DEVELOPMENT  
7.1. HMON  
7.1.1. MODE SUPPORT  
The HMON library is built to support Normal Mode only.  
7.1.2. BREAKPOINT SUPPORT  
The monitor utilises the Address Break Controller for code located in ROM, allowing a single breakpoint to be set in the code.  
Code located in RAM may have multiple breakpoints limited only by the size of the On-Chip RAM.  
Due to a limitation of the internal address break controller, a breakpoint set in ROM will execute the instruction at the  
breakpoint and stop on the subsequent op-code.  
7.1.2.1.CODE LOCATED IN FLASH / ROM  
Double clicking in the breakpoint column in the code sets the breakpoint. Adding a further breakpoint in the code removes  
the previous one. A warning message will be displayed in the message window when this occurs.  
7.1.2.2.CODE LOCATED IN RAM  
Double clicking in the breakpoint column in the code sets the breakpoint. Breakpoints will remain unless they are double  
clicked to remove them.  
7.1.3. HMON CODE SIZE  
HMON is built along with the debug code. Certain elements of the HMON code must remain at a fixed location in memory.  
The following table details the HMON components and their size and location in memory. For more information, refer to the  
map file when building code.  
Section  
Description  
Start Location  
Size  
(H’bytes)  
RESET_VECTOR  
TRAP_VECTORS  
HW_BREAK_VECTORS  
SCI_VECTOR  
HMON Reset Vector (Vector 0)  
Required for Startup of HMON  
Trap Vectors (Vector 8, 9, 10, 11)  
Required by HMON to create Trap Breakpoints in RAM  
HMON Break Controller (Vector 12)  
Required by HMON to create Breakpoints in ROM  
HMON Serial Port Vectors (Vector 23)  
Used by HMON when EDK is configured to connect to the  
default serial port.  
H’ 0000  
H’ 0010  
H’ 0018  
H’ 002E  
2
8
2
2
PHMON  
CHMON  
BHMON  
FDTInit  
HMON Code  
HMON Constant Data  
HMON Uninitialised data  
FDT User Mode Kernel.  
H’ 1000  
H’ 2C3E  
H’ FC80  
H’ 0400  
2C3D  
2D10  
1FD  
F7  
This is at a fixed location and must not be moved. Should the  
kernel need to be moved it must be re-compiled.  
FDT User Mode Kernel.  
This is at a fixed location and must not be moved. Should the  
kernel need to be moved it must be re-compiled.  
Pointer used by HMON to point to the start of user code.  
FDTUserModeMicroKernel  
CUser_Vectors  
H’ 0500  
H’ 0C00  
6CC  
4*  
* CUserVectors is a long word location with the upper 16 bits set to zero.  
14  
 
 
7.1.4.  
MEMORY MAP  
H'0000  
H'0001  
H'0010  
H'0017  
H'0000  
RESET Vector  
TRAP Vectors  
Vectors  
H'0400  
FDTInit  
H'04F7  
H'0500  
FDTUserModeMicr  
oKernel  
H'0018  
H'0019  
H'0BC1  
HW Break Vector  
SCI Vector  
H'0C00  
H'0C03  
CUser_Vectors  
H'1000  
H'002E  
H'002F  
PHMON  
CHMON  
H'2D10  
On-Chip FLASH  
ROM  
H'DFFF  
H'E800  
On-Chip RAM  
H'EFFF  
H'F700  
Internal I/O  
REGISTERS  
H'F77F  
H'F780  
On-Chip RAM  
BHMON  
H'FC7F  
H'FC80  
H'FE7C  
H'FE7D  
H'FE80  
H'FF7F  
H'FF80  
Stack  
Internal I/O  
REGISTERS  
H'EE00  
15  
 
7.1.5.  
BAUD RATE SETTING  
HMON has initially set to connect at 115200Baud. Should the user wish to change this, the value for the BRR in  
HMONserialconfiguser.c will need to be changed and the project re-built. Please refer to the HMON User Manual for further  
information.  
7.1.6.  
INTERRUPT MASK SECTIONS  
The EDK3687 has fixed interrupt priorities. The serial (SCI3 )port interrupt is used by HMON. The Real Time clock, external  
interrupt and Timer V interrupts have a higher priority than the serial port. If these interrupts are used HMON may not  
function correctly.  
7.2. ADDITIONAL INFORMATION  
For details on how to use HEW, with HMON, `refer to the HEW manual available on the CD or from the web site.  
For information about the H8/3687 series microcontrollers refer to the H8/3687 Series Hardware Manual  
For information about the H8/300 assembly language, refer to the H8300 Series Programming Manual  
Further information available for this product can be found on the Renesas web site at:  
General information on Renesas microcontrollers can be found at the following URLs.  
Global:  
16  
 
 

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