Quatech Server 80211B G User Guide

Product Specification  
802.11b/g High Performance Enterprise  
Device Server  
Revision: 1.1  
August 2009  
File name: databook wlng dp500 family.doc  
Document Number: 100-8080-110  
 
Airborne Enterprise Module Databook  
Quatech, Inc.  
Quatech Confidential  
Copyright © 2009 QUATECH ® Inc.  
ALL RIGHTS RESERVED. No part of this publication may be copied in any form, by photocopy, microfilm, retrieval  
system, or by any other means now known or hereafter invented without the prior written permission of QUATECH ® Inc..  
This document may not be used as the basis for manufacture or sale of any items without the prior written consent of  
QUATECH Inc..  
QUATECH Inc. is a registered trademark of QUATECH Inc..  
Airborne™ is a trademark of QUATECH Inc..  
All other trademarks used in this document are the property of their respective owners.  
Disclaimer  
The information in the document is believed to be correct at the time of print. The reader remains responsible for the  
system design and for ensuring that the overall system satisfies its design objectives taking due account of the information  
presented herein, the specifications of other associated equipment, and the test environment.  
QUATECH ® Inc. has made commercially reasonable efforts to ensure that the information contained in this document is  
accurate and reliable. However, the information is subject to change without notice. No responsibility is assumed by  
QUATECH for the use of the information or for infringements of patents or other rights of third parties. This document is  
the property of QUATECH ® Inc. and does not imply license under patents, copyrights, or trade secrets.  
Quatech, Inc. Headquarters  
®
QUATECH Inc..  
5675 Hudson Industrial Parkway  
Hudson, OH 44236  
USA  
Telephone: 330-655-9000  
Toll Free (USA): 800-553-1170  
Fax:  
330-655-9010  
Technical Support: 714-899-7543 / [email protected]  
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Contents  
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Airborne Enterprise Module Databook  
Figures  
Tables  
Table 4- Absolute Maximum Values1 ............................................................................................ 16  
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Quatech, Inc.  
1.0 Conventions  
The following section outlines the conventions used within the document, where  
convention is deviated from the deviation takes precedence and should be followed. If  
you have any question related to the conventions used or clarification of indicated  
deviation please contact Quatech Sales or Wireless Support.  
1.1  
1.2  
Terminology  
Airborne Enterprise Device Server and AirborneDirect Enterprise Device  
Server is used in the opening section to describe the devices detailed in this  
document, after this section the term module will be used to describe the  
devices.  
Notes  
A note contains information that requires special attention. The following  
convention will be used. The area next to the indicator will identify the specific  
information and make any references necessary.  
The area next to the indicator will identify the specific information and make any  
references necessary.  
1.3  
1.4  
Caution  
A caution contains information that, if not followed, may cause damage to the  
product or injury to the user. The shaded area next to the indicator will identify  
the specific information and make any references necessary.  
The area next to the indicator will identify the specific information and make any  
references necessary.  
File Format  
These documents are provided as Portable Document Format (PDF) files. To  
read them, you need Adobe Acrobat Reader 4.0.5 or higher. For your  
convenience, Adobe Acrobat Reader is provided on the Radio Evaluation Kit CD.  
Should you not have the CD, for the latest version of Adobe Acrobat Reader, go  
to the Adobe Web site (www.adobe.com).  
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Airborne Enterprise Module Databook  
2.0 Product Description  
The WLNG-AN-DP500 family is the latest generation of 802.11 wireless device servers  
from Quatech. The radio features the following:  
.
.
.
802.11b/g WiFi Radio with 32bit ARM9 CPU (128Mb SDRAM, 64Mb Flash)  
Supports WEP, WPA, WPA2 and 802.1x Supplicant, with Certificates.  
The wireless device server includes integrated:  
802.11b/g radio driver  
TCP/IP stack, UDP, telnet, FTP server  
Data bridging and buffering  
Command Line Interface  
Web interface  
WPA Supplicant  
802.11 Radio Driver  
.
.
.
.
.
.
Supports antenna diversity  
Operating Temperature (-40°C to 85°C)  
Storage temp (-50°C to 125°C)  
36 pin high density SMT connector (Hirose DF12-36)  
Dual (2) Hirose U.FL RF connector for RF antenna  
Multiple host interfaces supported:  
Dual UART (960K BAUD)  
Serial (RS232/422/485)  
SPI  
10/100 Ethernet PHY  
.
.
.
.
.
Advanced Low power modes  
Rugged mounting options.  
No host driver required  
Small form factor module (Dimensions: 29mm x 21mm x 6.0mm)  
Worldwide Regulatory Support  
Figure 1- WLNG-AN-DP500 Module Example  
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3.0 Block Diagram  
The following outlines the block diagram of the radio:  
Figure 2 - WLNG-SE/SP/AN/ET-DP500 Block Diagram  
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4.0 Model Numbers  
The following table identifies the model numbers associated with the device server family.  
Please contact Quatech sales for details, quotes and availability.  
Table 1 - Model Numbers  
Interface  
Security  
WiFi  
RoHS  
Model Number  
Description  
802.11b/g  
UART  
RS232  
RS485  
SPI  
Ethernet  
GPIO  
WEP  
WPA  
WPA2  
EAP  
802.11b/g, UART Interface with  
RS232/422/485 Driver Control  
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
WLNG-SE-DP501  
l
l
l
l
l
l
l
l
l
l
l
l
l
WLNG-SP-DP501  
WLNG-AN-DP501  
WLNG-ET-DP501  
802.11b/g, SPI Interface  
l
l
802.11b/g, UART Interface  
l
802.11b/g, 10/100 Ethernet Interface  
Eval Kit  
l
l
l
WLNG-EK-DP501  
WLNG-EK-DP502  
WLNG-EK-DP503  
802.11b/g Enterprise Class Serial Device Server Module Eval Kit (inc. WLNG-SE/AN-DP501)  
802.11b/g Enterprise Class SPI Device Server Module Eval Kit (inc. WLNG-SP-DP501)  
802.11b/g Enterprise Class Ethernet Bridge Module Eval Kit (inc. WLNG-ET-DP501)  
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5.0 Pin out and Connectors  
Pin definition is dependent upon the device type selected. The specific pin function is  
defined in Table 2 for each device type. Where multiple options are available for a single  
device type, these options are software selectable by the device firmware.  
Table 2 Module Pin Definition  
Device  
Type  
Pin  
Name  
Description  
1
2
3
4
5
6
7
8
GND  
TDI  
All  
Digital Ground  
JTAG: Test data in  
3.3VDC  
All  
VDD  
VDD  
RTCK  
DTXD  
/RESET  
DRXD  
RXD2  
RXD2  
RXD2  
RXD2  
G6  
All  
All  
3.3VDC  
All  
JTAG: Return Test Clock  
DOUT Debug  
All  
All  
Module RESET  
DIN Debug  
All  
UART  
Serial  
SPI  
DIN UART2  
DIN UART2  
9
DIN UART2  
Ethernet  
All  
DIN UART2  
GPIO  
10  
11  
TDO  
/FRESET  
CTS1  
CTS  
All  
JTAG: Test data out  
Factory RESET  
Clear-to-Send UART1  
Clear-to-Send  
SPI Select  
All  
UART  
Serial  
SPI  
12  
/SPI_SEL  
CTS1  
F5  
Ethernet  
All  
Clear-to-Send UART1  
GPIO  
NC  
UART  
Serial  
SPI  
No Connect  
NC  
No Connect  
13  
14  
NC  
No Connect  
RX+  
NC  
Ethernet  
UART  
Serial  
SPI  
Ethernet RX+  
No Connect  
NC  
No Connect  
NC  
No Connect  
RX-  
Ethernet  
All  
Ethernet RX-  
Digital Ground  
Digital Ground  
15  
16  
GND  
GND  
All  
RTS2  
/TXEN  
RTS2  
RTS2  
G2  
UART  
Serial  
SPI  
Ready-to-Send UART2  
Line Driver Tx enable  
Ready-to-Send UART2  
Ready-to-Send UART2  
GPIO  
17  
18  
Ethernet  
All  
RTS1  
RTS  
UART  
Serial  
SPI  
Ready-to-Send UART1  
Ready-to-Send  
SPI_CLK  
RTS1  
SPI Clock Input  
Ethernet  
Ready-to-Send UART1  
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Device  
Type  
Pin  
Name  
Description  
F4  
CTS2  
RXEN  
CTS2  
CTS2  
G1  
All  
UART  
Serial  
SPI  
GPIO  
Clear-to-Send UART2  
Line driver Rx enable  
Clear-to-Send UART2  
Clear-to-Send UART2  
GPIO  
19  
20  
21  
Ethernet  
All  
TCK  
All  
JTAG: Test clock  
DOUT UART2  
DOUT UART2  
DOUT UART2  
DOUT UART2  
GPIO  
TXD2  
TXD2  
TXD2  
TXD2  
G7  
UART  
Serial  
SPI  
Ethernet  
All  
G0  
UART  
Serial  
SPI  
GPIO  
SER_MODE  
SPI_INT  
G0  
Serial interface type selection (RS232/422/485)  
22  
23  
SPI Interrupt  
Ethernet  
GPIO  
LED_CON  
F6  
Valid TCP/IP Connection Indicator  
All  
GPIO  
RXD1  
RXD1  
MOSI  
RXD1  
F7  
UART  
Serial  
SPI  
DIN UART1  
DIN UART1  
24  
DIN SPI  
Ethernet  
All  
DIN UART1  
GPIO  
LED_POST  
F0  
POST Status Indicator  
25  
26  
27  
All  
All  
All  
GPIO  
LED_WLN_CFG  
F3  
Module TCP/IP Configuration Indicator  
GPIO  
LED_RF_LINK  
F2  
Module RF Link Status Indicator  
GPIO  
TXD1  
TXD  
UART  
Serial  
SPI  
DOUT UART1  
DOUT  
28  
MISO  
TXD1  
F1  
DOUT SPI  
Ethernet  
All  
DOUT UART1  
GPIO  
NC  
UART  
Serial  
SPI  
No Connect  
NC  
No Connect  
29  
30  
NC  
No Connect  
TX-  
Ethernet  
UART  
Serial  
SPI  
Ethernet TX-  
No Connect  
NC  
NC  
No Connect  
NC  
No Connect  
TX+  
Ethernet  
All  
Ethernet TX+  
JTAG: Test RESET signal  
JTAG: Test mode select  
3.3VDC  
31  
32  
33  
34  
35  
36  
NTRST  
TMS  
All  
VDD  
All  
VDD  
All  
3.3VDC  
LED_RF_ACT  
GND  
All  
Radio Status Indicator, driven by the radio.  
Digital Ground  
All  
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5.1  
Digital UART Ports  
The units supports two digital UART ports, use of these ports is determined by  
the device type choice made in firmware. The details of the ports can be seen in  
The availability of UART2 for these device types is selected in firmware.  
Table 3 - UART Pin Definition  
Device Type  
UART  
UART1  
Serial  
UART1  
All  
UART2  
Pin  
UART2  
Pin  
Pin Definition  
Debug  
Pin  
28  
24  
12  
18  
Pin  
28  
24  
12  
18  
17  
19  
22  
Data out (DOUT  
)
21  
9
21  
9
6
8
Data In (DIN)  
Clear-to-Send (CTS)  
19  
17  
Ready-to-Send (RTS)  
Transmit Enable (/TXEN)  
Receive Enable (/RXEN)  
Serial Mode (SER_MOD)  
The primary UART supports a 4-wire interface; the secondary port supports 4-  
wire interface except when being used with the Serial Device type, in which case  
it is reduced to a 2-wire only.  
The primary digital UART can be used as the primary connection for the Serial  
device type. This type supports a 7-wire interface to allow the definition of the  
serial interface type (RS232/3422/485) and the data transfer direction. Definitions  
of this interface can be seen in Table 3.  
The UART1 and UART2 interfaces support the following configurations:  
.
BAUD: 300, 600, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400,  
57600, 115200, 230400, 460800, 921600  
.
.
Flow Control: None, Hardware (CTS/RTS), Software (XON/XOFF)  
Default settings: 9600, 8, N, 1, No Flow Control.  
5.2  
Ethernet PHY Port  
A 10/100 Ethernet PHY interface is supported when the Ethernet device type is  
selected in firmware. This interface is a 10/100Mbps interface that supports auto  
negotiation and cross-over cabling. The interface also supports both half and full  
duplex for 10Mbps and 100Mbps.  
The interface uses a Broadcom BCM5241A Ethernet PHY, please refer to the  
manufacturers datasheet for interface details and appropriate design guidelines.  
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5.3  
Serial Peripheral Interface (SPI)  
Please refer to section 7.0 for details on this interface.  
5.4  
Debug/Console Port  
A debug/console port is supported by a 2-wire serial interface defined in Table 3.  
This port is a bidirectional serial port intended for debug of the unit only, it does  
not support data transfer.  
It is recommended that a connection to this port be supported via test points or a  
two pin header. The default settings for the debug port are 115200, 8, N 1, No  
Flow Control.  
CAUTION: Do not use the debug port without contacting Quatech Technical  
Support first. Potential damage to the module may occur.  
5.5  
General Purpose Input/Output (GPIO)  
A number of the interface pins support multiple functional definitions. Those  
defined as alternately GPIO pins can be selected as such via device firmware.  
The GPIO pins are digital I/O capable of supporting up to a 16mA drive current at  
3.3VDC.  
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5.6  
Connector Definition  
There are a total of three connectors to the radio:  
J1:  
36 pin Digital Host interface.  
Hirose: DF12-36DP-0.5V(XX) (0.50mm (.020") Pitch Plug, Surface  
Mount, Dual Row, Vertical, 4.00mm Stack Height, 36 Circuits)  
J2:  
J3:  
Primary RF connector for 802.11b/g antenna.  
Hirose U.FL  
Secondary RF connector for 802.11b/g antenna.  
Hirose U.FL.  
Bottom  
Top View  
View  
J3  
J2  
Component  
Area  
RF Shield  
J1  
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6.0 Electrical & RF Specification  
Table 4- Absolute Maximum Values1  
Parameter  
Min  
Max  
4.0  
Unit  
VDC  
W
Maximum Supply Voltage  
Power Dissipation  
-0.3  
2.00  
85  
Operating Temperature Range  
Storage Temperature  
-40  
-50  
oC  
125  
oC  
Note: 1. Values are absolute ratings, exceeding these values may cause permanent damage to the device.  
Table 5 Operating Conditions & DC Specification  
Symbol  
VDD  
Parameter  
Min  
3.00  
-0.3  
2.0  
Typ  
Max  
3.60  
Units  
Supply Voltage  
3.30  
V
VIL  
Input Low Level Voltage  
Input High Level Voltage  
Output Low Level Voltage  
Output High Level Voltage  
Operating Current UART Data In (802.11g)  
0.8  
VIH  
VDD + 0.3  
0.4  
VOL  
VOH  
VDD - 0.4  
ICCTXG  
340  
480  
360  
490  
mA  
mA  
Transmitting @ 54Mb/s  
UART 100% Duty Cycle @ 920K BAUD  
ICCRXG  
Operating Current UART Data Out  
(802.11g)  
Receiving valid packets @ 54Mb/s  
UART 100% Duty Cycle@ 920K BAUD  
ICCTXB  
Operating Current UART Data In (802.11b)  
340  
480  
360  
490  
mA  
mA  
Transmitting @ 11Mb/s  
UART 100% Duty Cycle @ 920K BAUD  
ICCRXB  
Operating Current UART Data Out  
(802.11b)  
Receiving valid packets @ 11MB/s  
UART 100% Duty Cycle @ 920K BAUD  
ICCTXG_ETH  
Operating Current Ethernet Data In  
(802.11g)  
470  
520  
500  
560  
mA  
mA  
Transmitting @ 54Mb/s  
10/100 Ethernet 100% Duty Cycle  
ICCRXG_ETH  
Operating Current Ethernet Data Out  
(802.11g)  
Receiving @ 54Mb/s  
10/100 Ethernet 100% Duty Cycle  
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Symbol  
Parameter  
Min  
Typ  
Max  
Units  
ICCTXB_ETH  
Operating Current Ethernet Data In  
520  
560  
mA  
(802.11b)  
Transmitting @ 11Mb/s  
10/100 100% Duty Cycle  
ICCRXB_ETH  
Operating Current Ethernet Data Out  
(802.11b)  
500  
530  
mA  
Receiving @ 11Mb/s  
10/100 Ethernet 100% Duty Cycle  
ICCU  
ICCE  
ISBU0  
Radio and CPU on. No data traffic (UART)  
Radio and CPU on. No data traffic (Ethernet)  
340  
330  
350  
360  
350  
360  
mA  
mA  
mA  
Radio off (UART)  
CPU Idle, radio off (f/w control)  
ISBE0  
Radio off (Ethernet)  
360  
370  
210  
mA  
mA  
CPU Idle, radio off (f/w control)  
ISB1  
Doze Mode  
140  
IEEE PSPoll mode, Associated, Idle, Beacon  
Interval = 100ms  
CPU Idle, wake on UART or Network traffic  
ISB3U  
Sleep Mode UART/Serial  
102  
95  
mA  
mA  
Radio in Deep Sleep (disassociated)  
CPU Idle, wake on UART traffic  
ISB3E  
Sleep Mode Ethernet  
Radio in Deep Sleep (disassociated)  
CPU Idle, wake on pm-mode  
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Table 6 - RF Characteristics 802.11b/g  
Average  
dBm / mW  
Peak  
dBm / mW  
Symbol  
Parameter  
Rate (Mb/s)  
Min  
Units  
Transmit Power  
Output 802.11b  
POUTB  
11, 5.5, 2, 1  
15.0  
31.6  
20.0  
100  
dBm  
48, 54  
24, 36  
12, 18  
6, 9  
11  
12.7  
15.0  
15.9  
16.0  
18.6  
31.6  
38.9  
39.8  
17.7  
20.0  
20.9  
21.0  
58.9  
100  
Transmit Power  
Output 802.11g  
POUTG  
dBm  
dBm  
123  
125.9  
Receive  
Sensitivity  
802.11b  
-82  
-91  
-68  
-78  
-80  
-86  
PRSENB  
1
54  
Receive  
Sensitivity  
802.11g  
36  
PRSENG  
dBm  
MHz  
18  
6
Frequency  
Range  
FRANGEBG  
2412  
2484  
18  
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Table 7 - Supported Data Rates by Band  
Band  
Supported Data Rates (Mb/s)  
11, 5.5, 2, 1  
802.11b  
802.11g  
54, 48, 36, 24, 18, 12, 9, 6  
Table 8 - Operating Channels  
Freq Range  
(GHz)  
No. of  
Channels  
Band  
Region  
Channels  
US/Canada  
Europe  
France  
2.401 - 2.473  
2.401 - 2.483  
2.401 - 2.483  
2.401 - 2.495  
2.401 - 2.473  
2.401 - 2.483  
2.446 - 2.483  
2.401 - 2.483  
11  
13  
4
1 11  
1 13  
10 13  
1 14  
1 11  
1 13  
10 13  
1 13  
802.11b  
Japan  
14  
11  
13  
4
US/Canada  
Europe  
France  
802.11g  
Japan  
13  
1. Only channels 1, 6 and 11 are non-overlapping.  
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Table 9 - RF Characteristics 802.11b/g  
Min  
dBm  
Average  
dBm / mW  
Peak  
dBm / mW  
Symbol  
Parameter  
Rate (Mb/s)  
Units  
Transmit Power  
Output 802.11b  
POUTB  
11, 5.5, 2, 1  
13  
10  
15  
12  
31.6  
15.9  
19.3  
21.5  
85.1  
dBm/mW  
Transmit Power  
Output 802.11g  
6, 9,12,18, 24,  
36, 48, 54  
POUTG  
141.3 dBm/mW  
11  
5.5  
2
-84  
-85  
-86  
-86  
-69  
-70  
-74  
-78  
-81  
-83  
-85  
-86  
Receive Sensitivity  
802.11b  
PRSENB  
dBm  
1
54  
48  
36  
24  
18  
12  
9
Receive Sensitivity  
802.11g  
PRSENG  
dBm  
6
FRANGEBG  
Frequency Range  
2412  
2484  
MHz  
20  
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6.1  
6.2  
AC Electrical Characteristics Transmitter  
Transmit power is automatically managed by the device for minimum power  
consumption. The MAXIMUM transmit power at the RF connector is typically  
+15dBm 2 dB for B-Mode (all rates) and +12dBm+/-2dB for G-Mode (all rates).  
Performance/Range  
The following table illustrates the typical data rates, performance and range the  
device is capable of providing using an omni directional antenna.  
Table 10 - Radio Typical Performance Range  
Typical Outdoor Distance  
Typical Outdoor Distance  
Data Rate  
(2dBi antenna gain on each end for  
(Unity gain antenna)  
B/G mode)  
1.0 Mb/s  
240m  
135m  
135m  
49m  
380m  
215m  
215m  
155m  
19m  
11.0 Mb/s  
6Mb/s 802.11g  
6Mb/s 802.11a  
54Mb/s 802.11g  
54Mb/s 802.11a  
12m  
4.5m  
14m  
Ranges are based on receiver sensitivity, Transmitter power, free-space path  
loss estimates, antenna gain factors, and link margin estimates. Actual range will  
vary from those stated. Non-line-of-site applications will result in typical values  
less than shown above.  
The Data Rate is the supported connection rate for the wireless link, the actual  
data throughput for the link will be less than the stated data rates.  
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7.0 SPI Interface  
The following section details the SPI interface specification for both hardware timing and  
SPI protocol. The device is a SPI slave and requires a compatible SPI master for  
operation.  
7.1  
Pinout  
When the SPI interface is enabled, through the CLI or web interface, the  
following pins are assigned for communication.  
Table 11 - SPI Pinout Details  
Pin Definition  
Master In Slave Out (MISO)  
Master Out Slave In (MOSI)  
SPI Interrupt (SPI_INT)  
SPI Clock (SPI_CLK)  
SPI  
28  
UART2 Pin  
Debug  
24  
22  
18  
SPI Select (/SPI_SEL)  
12  
Data In (RxD2, DTXD)  
Data out (TxD2, DRXD)  
Ready-to-Send (RTS2)  
Clear-to-Send (CTS2)  
9
8
6
21  
17  
19  
Table 12 - SPI Signal Descriptions  
Pin Definition  
Description  
Master In Slave Out (MISO)  
Serial Data OUT; must be connected to the serial data in of  
the master.  
Master Out Slave In (MOSI)  
SPI Interrupt (SPI_INT)  
Serial Data IN; Must be connected to the serial data out of the  
master.  
Interrupt signal driver by slave see Table 16 for details of  
operation.  
SPI Clock (SPI_CLK)  
SPI Select (/SPI_SEL)  
SPI clock sourced from the master.  
Enable the SPI slave, sourced from the master. Active low  
signal.  
7.2  
SPI AC Characteristics  
The following specification identifies the required hardware timing to successfully  
implement a SPI interface with the Airborne Device Server module.  
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Table 13 - SPI AC Timings  
Symbol  
fMAX  
tCS  
Parameter  
Min  
Typ  
Max  
Units  
MHz  
ns  
Maximum Clock Frequency  
SPI Select Low to Clock Rising Edge  
Clock High  
8.00  
100  
62.5  
62.5  
tCH  
ns  
tCL  
Clock Low  
ns  
tDA  
Clock High to Data Out  
60  
ns  
tDS  
Clock Low to Data In Valid Set-up time  
Clock Low to Data Valid Hold time  
Clock Falling Edge to SPI Select High  
SPI Select High to SPI Select Low  
14  
2
ns  
tDH  
ns  
tCSH  
tDELAY  
100  
40  
ns  
ns  
Figure 3 - SPI Read/Write Timing  
Figure 4 - SPI Clock and Select Timing  
7.3  
SPI Protocol  
A SPI message is composed of a 4 byte header followed by 0 or more bytes of  
data. The header data is full-duplex. That is, the Tx message header is sent to  
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the Airborne Device Server module by the host at the same time the Rx message  
header is sent to the host from the Airborne Device Server.  
The Tx message header consists of a Command (CMD) byte, followed by three  
Parameter (PARM) bytes. They are described in the SPI Commands section  
(7.4) below.  
The Rx message header consists of a Rx Data Available field, and a Tx Buffer  
Available field. The Rx Data Available field indicates the number of data bytes  
the Device Server has available for the host. They can be received by the  
RXDATA command. The Tx Buffer Available field indicates how many data  
bytes the Device Server is able to accept from the host. This data is to be shifted  
in by the host using the TXDATA (Table 16) command. Both fields are 16 bit  
values and are stored in little-endian format (LSB first).  
Table 14 - Tx Message Header  
0
1
2
3
CMD  
PARAM1  
PARAM2  
Table 15 - Rx Message Header  
0
1
2
3
Rx Data Available  
Tx Buffer Available  
7.4  
SPI Commands  
The following commands are available for use in the CMD message header.  
Table 16 - SPI Command Description  
Command  
(Hex)  
Name  
Description  
The NOP command does nothing.  
0x00  
NOP  
It is intended to be used when the host wants to simply retrieve  
the Rx Message Header without any other operation.  
The BREAK command will issue a break sequence to the  
module.  
0x04  
0x08  
BREAK  
It is analogous to the BREAK signal on a common UART.  
The TXINTCLR command will clear the Tx interrupt.  
TXINTCLR  
Use this command when the module is issuing a Tx interrupt but  
there is no more data to send. This is analogous to the reset Tx  
interrupt command on a common UART.  
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Command  
(Hex)  
Name  
Description  
The INTENA command will enable interrupts from the module.  
For this command, the PARM1 field will define the interrupts to  
be enabled.  
0x10  
INTENA  
The definition of the PARM1 field is as follows:  
B7  
Interrupt Sense Determines the asserted state of  
the interrupt pin. If this bit is set, the interrupt pin  
will be active high, otherwise the interrupt pin will be  
active low.  
B1  
B0  
TX Interrupt If this bit is set, the interrupt pin will  
be asserted when there is space available in the Tx  
buffer.  
RX Interrupt If this bit is set, the interrupt pin will  
be asserted when there is Rx data available.  
The INTDIS command will disable interrupts from the module.  
For this command, the PARM1 field will define the interrupts to  
be disabled.  
0x20  
INTDIS  
The definition of the PARM1 field is as follows:  
B1  
TX Interrupt If this bit is set, The Tx interrupt  
function will be disabled.  
B0  
RX Interrupt If this bit is set, the Rx interrupt  
function will be disabled.  
The TXDATA command is used to send data to the module to  
be transmitted on the wireless link.  
0x40  
TXDATA  
The host may send at most the number of bytes indicated by the  
Tx Buffer Available field in the Rx Message Header. The actual  
length sent by the host is determined by the 16 bit value in  
PARM2. The value in PARM2 is little-endian (LSB first) and  
must be less than or equal to the number in the Tx Buffer  
Available field. Any bytes sent in excess of this number will be  
ignored.  
The RXDATA command is used to receive data from the  
module that has been received on the wireless link.  
0x80  
RXDATA  
The host may receive at most the number of bytes indicated by  
the Rx Data Available field in the Rx Message Header. The  
actual number of bytes received by the host is determined by  
the 16 bit value in PARM2. The value in PARM2 is little-endian  
(LSB first) and must be less than or equal to the number in the  
Rx Data Available field. If additional clock cycles are sent to the  
module beyond this number, meaningless data will be returned.  
The TXDATA and RXDATA commands can be combined for full-duplex  
operation. For example, a command byte of 0xC0 would be a TXDATA and  
RXDATA command combined. The result of this command would be that the  
module would accept data being shifted in as Tx data, while at the same time, Rx  
data would be shifted out. In this case, the number of bytes transferred for  
TXDATA must be equal to the number of bytes transferred for RXDATA. The  
PARM2 parameter will indicate the number of bytes to be transferred for both the  
TXDATA and RXDATA commands.  
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8.0 Antenna  
The unit supports antenna connection through a single Hirose U.FL connector, located on  
the top surface of the radio next to the RF shielding.  
Any antenna used with the system must be designed for operation within the 2.4GHz  
ISM band and specifically must support the 2.412GHz to 2.482GHz for 802.11b/g  
operation. They are required to have a VSWR of 2:1 maximum referenced to a 50  
system impedance.  
8.1  
Antenna Selection  
The Airborne radio supports a number of antenna options, all of which require  
connection to the U.FL connectors on the radio. Ultimately the antenna option  
selected will be determined by a number of factors, these include consideration  
of the application, mechanical construction and desired performance. Since the  
number of possible combinations is endless we will review some of the more  
common solutions in this section. If your application is not covered during this  
discussion please contact Technical Support for more specific answers.  
The available antenna connections include:  
.
.
.
Host board mounted antenna  
Host Chassis mounted antenna  
Embedded antenna  
In addition to the above options, location and performance need to be  
considered, the following sections discuss these items.  
8.2  
Host Board Mounted Antenna  
Host board mounted requires that an antenna connection is physically mounted  
to the host system board. It also requires that the host board include a U.FL  
connector (two (2) if diversity is being used) to allow a U.FL to U.FL coaxial lead  
to connect from the radio to the host board. It will then require 50 matched PCB  
traces to be routed from the U.FL connector to the antenna mount.  
There are several sources for the U.FL to U.FL coaxial cable these include  
Hirose, Sunridge and IPEX. Please contact Quatech for further part numbers and  
supply assistance.  
This approach can simplify assembly but does require that the host system  
configuration can accommodate an antenna location that is determined by the  
host PCB. There are also limitations on the ability to seal the enclosure when  
using this approach.  
This approach also restricts the selection of available antenna. When using this  
approach, antennas that screw or press fit to the PCB mount connector must be  
used. There are many options for the antenna connector type, however if you  
wish to utilize the FCC/IOC modular approval the connector choice must comply  
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with FCC regulations, these state a non-standard connector is required e.g.  
TNC/SMA are not allowed, RP-TNC/RP-SMA are allowed.  
8.3  
Host Chassis Mounted Antenna  
Host Chassis mounted antennas require no work on the host PCB. They utilize  
an antenna type called ‘flying lead’. There are two types of flying leads; one  
which provides a bulkhead mounted antenna connector and one which provides  
a bulk head mounted antenna. The type you choose will be determined by the  
application.  
A flying lead system connects a U.FL coaxial lead to the radio’s U.FL connector,  
the other end of the coax is attached to either a bulkhead mounted antenna  
connector or directly to an antenna that has an integrated bulkhead mount.  
In either of the two cases, the use of this approach significantly reduces the  
antenna system development effort and provides for greater flexibility in the  
available antenna types and placement in the host system chassis.  
When using the flying lead antenna (integrated bulk head mounting), there are no  
connector choice restrictions for use with the FCC/IOC modular certification.  
However if the flying lead connector is used, the same restrictions as identified  
for the Host Mounted Antenna apply.  
There are many suppliers of flying lead antenna and connectors; Quatech’s  
Airborne Antenna product line offers a range of antenna solutions.  
8.4  
Embedded Antenna  
Use of Embedded antenna can be the most interesting approach for M2M,  
industrial and medical applications. Their small form factor and absence of any  
external mounting provides a very compelling argument for their use. There is a  
downside to this antenna type and it comes with performance. Antenna  
performance for all of the embedded options will, in most cases, be less that that  
achievable with external antenna. This does not make them unusable; it will  
impact choice of antenna type and requires more focus on placement.  
The three main embedded antenna types are PCB embedded, chip (PCB  
mounted) and flying lead; each has its advantages and disadvantages (See  
Table 17 - Embedded Antenna Options  
Features  
Antenna Type  
Cost  
Lowest  
Low  
Size  
Largest  
Small  
Availability  
Custom  
Performance  
PCB Embedded  
Chip  
Poor  
Poor  
Fair  
Standard  
Standard  
Flying Lead  
Low  
Small  
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PCB Embedded This approach embeds an antenna design into the host PCB.  
This approach is very common with add-in WiFi card (CF, PCMCIA, SDIO, etc.)  
as it requires no external connections and is the cheapest production approach.  
The lower production cost requires significant development cost and lack of  
performance and flexibility.  
Chip The integration of a chip antenna is simple and requires a relatively small  
footprint on the host system, however, it does suffer from the same limitations of  
flexibility and performance seen with the PCB embedded approach. There are  
relatively large numbers of suppliers of this type of antenna; there is also a range  
of configuration and performance options.  
Flying Lead This approach is similar to the flying lead solution for external  
antennas, the difference is that the form factors are smaller and provide a range  
of chassis and board mounting options, all for internal use. This approach suffers  
less from the performance and flexibility limitations of the other approaches,  
since the location of the antenna it not determined by the host PCB design. The  
assembly of a system using this approach maybe slightly more complex since  
the antenna is not necessarily mounted on the host PCBA.  
8.5  
Antenna Location  
The importance of this design choice cannot be over stressed; it can in fact be  
the determining factor between success and failure of the WiFi implementation.  
There are several factors that need to be considered when determining location:  
.
.
Distance of Antenna from radio  
Location of host system  
Proximity to RF blocking or absorbing materials  
Proximity to potential noise or interference  
Position relative to infrastructure (Access Points or Laptops)  
Orientation of host system relative to infrastructure  
.
Is it known  
Is it static  
To minimize the impact of the factors above the following things need to be  
considered during the development process:  
.
Minimize the distance between the radio and the location of the antenna. The  
coaxial cable between the two impacts the Transmit Power and Receive  
Sensitivity negatively. Quatech recommends using 1.32-1.37mm outer  
diameter U.FL coaxial cables.  
.
.
Minimize the locations where metal surfaces come into contact or are close  
to the location of the antenna.  
Avoid locations where RF noise, close to or over lapping the ISM bands, may  
occur. This would include microwave ovens and wireless telephone systems  
in the 2.4GHz and 5.0GHz frequency range.  
.
Mount the antenna as high on the equipment as possible.  
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.
.
Locate the antenna where there is a minimum of obstruction between the  
antenna and the location of the Access Points. Typically Access Points are  
located in the ceiling or high on walls.  
Keep the main antenna’s polarization vertical, or in-line with the antenna of  
the Access Points. 802.11 systems utilize vertical polarization and aligning  
both transmit and receive antenna maximizes the link quality.  
Even addressing all of the above factors, does not guarantee a perfect  
connection, however with experimentation an understanding of the best  
combination will allow a preferred combination to be identified.  
8.6  
Performance  
Performance is difficult to define as the appropriate metric changes with each  
application or may indeed be a combination of parameters and application  
requirements. The underlying characteristic that, in most cases, needs to be  
observed is the link quality. This can be defined as the bandwidth available over  
which communication, between the two devices, can be performed, the lower the  
link quality the less likely the devices can communicate.  
Measurement of link quality can be made in several ways; Bit Error Rate (BER),  
Signal to Noise (SNR) ratio, Signal Strength and may also include the addition of  
distortion. The link quality is used by the radio to determine the link rate,  
generally as the link quality for a given link rate drops below a predefined limit,  
the radio will drop to the next lowest link rate and try to communicate using it.  
The reciprocal is also true, if the radio observes good link quality at one rate it will  
try to move up to the next rate to see if communication can be sustained using it.  
It is important to note that for a given position the link quality improves as the link  
rate is reduced. This is because as the link rate drops the radios Transmit power  
and Receive sensitivity improve.  
From this it can be seen that looking at the link rate is an indirect way of  
assessing the quality of the link between the device and an Access Point. You  
should strive to make the communication quality as good as possible in order to  
support the best link rate. However be careful not to over specify the link rate.  
Consider your applications bandwidth requirements and tailor your link rate to  
optimize the link quality e.g. the link quality for a location at 6Mb/s is better than it  
would be for 54Mb/s, if the application only needs 2Mb/s of data throughput, the  
6Mb/s rate would provide a better link quality.  
Aside from the radio performance, there are a number of other things that  
contribute to the link quality; these include the items discussed earlier and  
choices made when looking at the overall antenna gain. The antenna gain  
contributes to the Equivalent Isotropically Radiated Power (EIRP) of the system.  
This is part of an overall measurement of the link quality called link margin.  
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Link Margin provides a measure of all the parts of the RF path that impact the  
ability of two systems to communicate. The basic equation looks like this:  
EIRP (dB) = TxP + TxA TxC  
Link Margin (dB) = EIRP FPL + (RxS + RxA RxC)  
Where:  
TxP = Transmitter output power (dBm)  
TxA = Transmitter antenna gain (dBi)  
TxC = Transmitter to Antenna coax cable loss (dB)  
FPL = Free Path Loss (dB)  
RxS = Receiver receive sensitivity (dBm)  
RxA = Receiver antenna gain (dBi)  
RxC = Receiver to Antenna coax cable loss (dB)  
This is a complex subject and requires more information than is presented here,  
Quatech recommends at reviewing the subject and evaluating any system at a  
basic level.  
It is then possible, with a combination of the above items and an understanding  
of the application demands, to achieve a link quality optimized for the application  
and host design. It is important to note that this is established with a combination  
of hardware selection, design choices and configuration of the radio.  
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9.0 RESET Function  
For correct operation of the on-board Power-on RESET (POR) and internal RESET  
controllers, the RESET pin on the WLNG-XX-DP500 family must obey the following  
timing and signal conditions.  
Figure 5 - Power on RESET Timing  
Figure 6 - RESET Timing  
Table 18 - RESET Timing  
Min  
Typ  
Max  
Units  
ms  
ms  
ms  
µs  
Symbol  
tPURST  
tRLRV  
Parameter  
Valid VDD to RESET valid  
RESET Valid to RESET Low  
Valid VDD to Internal RESET completed  
RESET Pulse Width  
200  
0
tRPWI  
200  
tRPW  
100  
For Hardware revisions Rev C2 and earlier additional timing constraints apply. Please contact  
Quatech Technical Support for details.  
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10.0 Mechanical Outline  
2.75 [0.11]  
2.25 [0.09]  
Part# Hirose U.FL-R SMT Coaxial Antenna Connector (2X)  
16.02 [0.63]  
16.00 [0.63]  
16.00 [0.63]  
10.50 [0.41]  
10.50 [0.41]  
29.60 [1.17] MAX  
40.60 [1.60] MAX  
1.84 [0.07]  
12.37 [0.49] MAX  
18.27 [0.72] MIN  
30.70 [1.21] MIN  
Part# Hirose DF12-36DS-0.5V  
Not available for mounting  
35  
36  
1
2
15.90 [0.63]  
3X Ø2.00 [Ø0.08]  
3X Ø1.00 [Ø0.04]  
Dimensions mm [inches]  
Tolerance ± 1.27 [0.05] unless noted  
Radio Connector:  
DF12-36DS-0.5V(XX) (Hirose)  
Hirose: 0.50mm (.020") Pitch Plug, Surface Mount, Dual Row, Vertical, 4.00mm  
Stack Height, 36 Circuits  
Board Connector:  
DF12-36DP-0.5V(XX) (Hirose)  
Hirose: 0.50mm (.020") Pitch Plug, Surface Mount, Dual Row, Vertical, 4.00mm  
Stack Height, 36 Circuits  
RF Connector:  
U.FL  
Hirose: Ultra Small Surface Mount Coaxial Connector  
Mounting Screw:  
3/8 inch length, 0-42 thread Zinc Plated Steel Tri-P Torx  
Thread-Form Screw for plastic  
McMaster-Carr: 99512A117 (Zinc Plated Steel)  
McMaster-Carr: 96001A107 (Stainless Steel)  
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11.0 Certification & Regulatory Approvals  
The unit complies with the following agency approvals:  
Table 19 - Regulatory Approvals  
Country  
Standard  
Status  
FCC Part 15  
North America  
(US & Canada)  
Sec. 15.107, 15.109, 15.207, 15.209, 15.247  
Modular Approval  
Granted  
CISPR 16-1 :1993  
Europe  
Japan  
ETSI EN 300 328 Part 1 V1.2.2 (2000-07)  
ETSI EN 300 328 Part 2 V1.1.1 (2000-07)  
Completed  
Pending  
ARIB STD-T71 v1.0, 14 (Dec 2000)  
ARIB RCR STD-T33 (June 19, 1997)  
ARIB STD-T66 v2.0 (March 28, 2002)  
11.1 FCC Statement  
This equipment has been tested and found to comply with the limits for a Class B  
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed  
to provide reasonable protection against harmful interference in a residential  
installation. This equipment generates uses and can radiate radio frequency  
energy and if not installed and used in accordance with the instructions, may  
cause harmful interference to radio communications. However, there is no  
guarantee that interference will not occur in a particular installation. If this  
equipment does cause harmful interference to radio or television reception, which  
can be determined by turning the equipment off and on, the user is encouraged  
to try to correct the interference by one or more of the following measures:  
.
.
.
Reorient or relocate the receiving antenna.  
Increase the separation between the equipment and receiver.  
Connect the equipment to an outlet on a circuit different from that to which  
the receiver is connected.  
.
Consult the dealer or an experienced radio/TV technician for assistance.  
11.2 FCC RF Exposure Statement  
To satisfy RF exposure requirements, this device and its antenna must operate  
with a separation distance of a least 20 cm from all persons and must not be co-  
located or operating in conjunction with any other antenna or transmitter.  
11.3 Information for Canadian Users (IC Notice)  
This device has been designed to operate with an antenna having a maximum  
gain of 5dBi for 802.11b/g band. An antenna having a higher gain is strictly  
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prohibited per regulations of Industry Canada. The required antenna impedance  
is 50 ohms.  
To reduce potential radio interference to other users, the antenna type and its  
gain should be so chosen that the equivalent isotropically radiated power (EIRP)  
is not more than required for successful communication.  
Operation is subject to the following two conditions: (1) this device may not cause  
interference, and (2) this device must accept any interference, including  
interference that may cause undesired operation of the device.  
11.4 FCC/IOC Modular Approval  
This document describes the Airborne WLN FCC modular approval and the  
guidelines for use as outlined in FCC Public Notice (DA-00-1407A1).  
The WLRG-RA-DP101 is covered by the following modular grants:  
Grant  
Country  
Standard  
FCC Part 15  
North America (US)  
Sec. 15.107, 15.109, 15.207, 15.209, 15.247  
Modular Approval  
F4AWLNG1  
RSS 210  
Canada  
39139A-WLNG1  
Modular Approval  
By providing FCC modular approval on the Airborne WLN modules, the  
customers are relieved of any need to perform FCC part15 subpart C Intentional  
Radiator testing and certification, except where they wish to use an antenna that  
is not already certified.  
Quatech supports a group of pre-approved antenna; use of one of these  
antennas eliminates the need to do any further subpart C testing or certification.  
If an antenna is not on the list, it is a simple process to add it to the pre-approved  
list without having to complete a full set of emissions testing. Please contact  
Quatech Technical support for details of our qualification processes.  
Please note that as part of the FCC requirements for the use of the modular  
approval, the installation of any antenna must require a professional installer.  
This is to prevent any non-authorized antenna being used with the radio. There  
are ways to support this requirement but the most popular is to utilize a non-  
standard antenna connector, this designation includes the reverse polarity  
versions of the most popular RF antenna types (SMA, TNC, etc.). For more  
details please contact Quatech.  
The following documents are associated with this applications note:  
.
FCC Part 15 Radio Frequency Devices  
.
FCC Public Notice DA-00-1407A1 (June 26th, 2000)  
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Quatech recommends that during the integration of the radio, into the customers  
system, that any design guidelines be followed. Please contact Quatech  
Technical Support if you have any concerns regarding the hardware integration.  
Contact Quatech Technical support for a copy of the FCC and IOC grant  
certificates, the test reports and updated approved antenna list.  
11.5 Regulatory Test Mode Support  
The Airborne Device Server includes support for all FCC, IC and ETSI test  
modes required to perform regulatory compliance testing on the module, please  
contact Quatech Technical Support for details on enabling and using these  
modes.  
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12.0 Physical & Environmental Approvals  
The device has passed the following primary physical and environmental tests. The test  
methods referenced are defined in SAE J1455 Aug1994.  
Table 20 - Mechanical Approvals  
Test  
Reference  
Conditions  
Temperature Range  
(Operational)  
Table 1B, Type 2b  
-40°C to +85°C  
Temperature Range (Non-  
Operational)  
-50°C to +125°C  
0-95%RH @ 38°C condensing  
Humidity  
Altitude  
Sect 4.2.3  
Sect 4.8  
Sect 4.9  
Fig 4a 8 hours active humidity cycle  
Operational: 0-12,000ft (62 KPa absolute pressure)  
Non-operational: 0-40,000ft (18.6 KPa absolute  
pressure)  
Operational: 2.4 Grms, 10-1K Hz, 1hr per axis  
Non-operational: 5.2 Grms, 10-1K Hz, 1hr per axis  
Vibration  
Shock  
Sect 4.10  
Operational: 20Gs MAX, 11ms half-sine pulse  
1m onto concrete, any face or corner, 1 drop  
Product Drop  
Sect 4.10.3.1  
32 inches onto concrete on each face and corner.  
Packaging Drop  
Sect 4.10.2.1  
Packaged in ‘for transit’ configuration.  
MIL-STD-883  
Method 1015  
Accelerated Life Test  
1000hrs @ 125°C, static bias  
Test reports are available from Quatech Technical Support, please contact directly for the  
latest documentation.  
36  
8/11/2009  
100-8080-110  
 
   
Airborne Enterprise Module Databook  
Quatech, Inc.  
13.0 Change Log  
The following table indicates all changes made to this document:  
Version  
1.0  
Date  
Section  
-
Change Description  
Author  
ACR  
04/16/2009  
08/11/2009  
Initial Release  
1.1  
3.0  
Updated block diagram with SPI interface.  
Table 2: Removed reference to GPIO on pin 35  
Added section 5.3 SPI interface section.  
Table 4.0: Changed maximum voltage to 4.0VDC  
Table 5.0: Updated Power state labels and values  
Added section 7.0 SPI interface specification.  
ACR  
5.0  
5.3  
6.0  
7.0  
11.5  
Added reference to Regulatory Test Mode Support in  
module  
12.0  
Table 16: Removed reference to Salt Spray  
environmental test.  
100-8080-110  
8/11/2009  
37  
 
 

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