PMC Sierra Network Card PM5347 User Manual

PM5347  
PMC-Sierra,Inc.  
S/UNI-155-PLUS  
155 Mb/s SATURN User Network Interface for WANs  
• Extracts the 16- or 64-byte section  
trace (J0) sequence and the 16- or 64-  
byte path trace (J1) sequence into  
internal register banks.  
• Extracts the DCC channels (D1-D3  
and D4-D12) for optional external  
processing.  
• Detects Loss Of Signal (LOS), Out Of  
Frame (OOF), Loss Of Frame (LOF),  
line Alarm Indication Signal (AIS), line  
Remote Defect Indication (RDI-L),  
Loss Of Pointer (LOP), path AIS, path  
RDI (RDI-P) and Loss Of Cell  
Delineation (LCD).  
• Counts received section B1 errors, line  
B2 errors, line FEBEs, path B3 errors  
and path FEBEs for performance  
monitoring purposes.  
TRANSMIT SECTION  
• Counts transmit cells read from the  
transmit FIFO.  
• Inserts a register programmable path  
signal label (C2).  
FEATURES  
• Monolithic SATURN®-compatible  
Asynchronous Transfer Mode (ATM)  
network interface.  
• Implements the ATM transmission  
convergence (TC) sublayer for ATM  
according to ATM Forum specifications  
and ITU-T recommendations using the  
SONET/SDH 155.52 Mb/s format. Also  
implements ATM Forum specified  
“Mid-range PHY” rates of 51.52, 25.92  
and 12.96 Mb/s.  
• Includes on-chip clock recovery and  
clock synthesis at all rates. Clocking  
can be bypassed for use with external  
clock sources. Operates in master or  
slave (loop timed) timing modes.  
• Provides TTL-compatible inputs and  
outputs. Provides differential pseudo-  
ECL-compatible serial line side inputs.  
• Supports Fiber Optic, Unshielded  
Twisted Pair and Shielded interfaces.  
• Processes all SONET/SDH UNI  
overhead.  
• Inserts path B3, path FEBE  
indications, line B2, line FEBE  
indications, and section B1 to allow  
performance monitoring at the far end.  
• Optionally inserts the 16- or 64-byte  
section trace (J0) sequence and the 16  
or 64 byte path trace (J1) sequence  
from internal register banks.  
• Optionally inserts an externally  
generated section user channel (F1),  
order wire channels (E1, E2) and the  
DCC channels (D1-D3 and D4-D12)  
via serial interfaces.  
• Optionally inserts path AIS, path RDI,  
line AIS, and line RDI.  
• Optionally inserts register  
programmable APS (K1, K2) and  
synchronization status (Z1) bytes.  
APPLICATIONS  
• ATM Switching Systems  
• ATM Access Systems  
• LAN Switches, Hubs and Routers  
• ATM Test Equipment  
RECEIVE SECTION  
• Provides access to section and line  
datalinks and all additional transport  
and path overhead to allow additional  
external processing for full SONET/  
SDH Network-Node Interface (NNI)  
compliance.  
• SONET or SDH ATM Interfaces  
• Filters and captures the automatic  
protection switch channel (K1, K2)  
bytes in readable registers and detects  
APS byte failure.  
• Provides synchronous 8-bit or 16-bit  
SCI-PHY™ system side interface with  
4-cell deep FIFO buffers in transmit  
and receive paths with parity support.  
• Inserts and extracts ATM payloads  
using cell delineation.  
BLOCK DIAGRAM  
Line Side  
System Side  
• Provides a generic 8-bit  
Transport  
O/H  
Extract  
Path  
O/H  
Extract  
Parallel  
Input/Output Port  
JTAG Test  
Access Port  
microprocessor bus interface for  
configuration, control, and status  
monitoring.  
TSOC  
TDAT[15:0]  
TXPRTY[1:0]  
TCA  
• Software-compatible with the PM5345  
S/UNI-155™, PM5346 S/UNI-155-  
LITE™ and the PM5355 S/UNI-622™.  
• Provides a standard 5-signal P1149.1  
JTAG test port for boundary scan  
board test purposes.  
• Low power, +5 V CMOS technology.  
• Packaged in a 208 pin (28mm x  
28mm) PQFP with 0.5mm pin pitch.  
• Industrial temperature range operation  
(-40LC to +85LC).  
Transmit  
Transmit  
Line O/H  
Processor  
TRCLK+/-  
TXD+/-  
Transmit  
Section O/H  
Processor  
Clock  
Recovery  
SIPO  
Transmit  
ATM  
Transmit  
ATM 4-Cell  
FIFO  
Path Overhead  
Processor  
TWRENB  
TFCLK  
Cell Processor  
TXC+/-  
Drop  
Side  
I/F  
Path  
Trace  
Buffer  
Section  
Trace  
Buffer  
RXDO+/-  
RXD+/-  
RSOC  
Clock  
Recovery  
SIPO  
Receive  
ATM  
Cell Processor  
Receive  
ATM 4-Cell  
FIFO  
Receive  
Section O/H  
Processor  
Receive  
Path Overhead  
Processor  
Receive  
Line O/H  
Processor  
RDAT[15:0]  
RXPRTY[1:0]  
RCA  
ALOS+/-  
RRCLK+/-  
RRDENB  
RFCLK  
Transport  
Path  
O/H  
Extract  
Microprocessor  
Interface  
O/H  
Extract  
• Counts received cells written into the  
receive FIFO, received HCS errored  
cells that are discarded, and received  
HCS errored cells that are corrected  
and passed through the receive FIFO.  
PMC-930909 (R7)  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE1998 PMC-Sierra, Inc. October,  
 

Pelco Security Camera 13M15 50 User Manual
Pelco TV Mount c216sm User Manual
Philips CRT Television 15PT2767 User Manual
Philips Electric Shaver 5841XL User Manual
Philips Headphones HTS5563 User Manual
Philips TV VCR Combo CCA092AT User Manual
Philips Work Light P 2497 E User Manual
Poulan Snow Blower 422078 User Manual
Premier Mounts TV Mount WMK 027 User Manual
Proson Stereo Amplifier PA 150 User Manual